Asynchronous VLSI and Architecture
The group is moving to
Yale
in January 2017.
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analysis
applications
architecture
arrays
asymmetric
automated
cell
chip
circuits
computation
concurrent
core
data
dataflow
density
design
digital
dimensional
dynamic
energy-efficient
fault
floating-point
fpga
gps
integrated
large-scale
logic
model
networks
neurosynaptic
parallel
pipeline
power
processor
programmable
reduce
routing
sensor
simulation
speed
spiking
static
synthesis
systems
techniques
technology
verification
vlsi
wireless